A) Field of the Invention
The present invention relates to charge transfer devices made of charge coupled devices (CCD's), their driving method and a solid state image pickup device having charge transfer devices.
B) Description of the Related Art
CCD can be formed, for example, by forming a stripe shaped n-type channel in a surface layer of a p-type region formed in a semiconductor substrate and disposing a plurality of electrodes (transfer electrodes) traversing the n-type channel as viewed in plan on the semiconductor substrate.
By controlling the value of a voltage applied to each transfer electrode of CCD, it is possible to control the potential profile of the n-type channel. Charges distributed in the n-type channel can be transferred to the region under a desired transfer electrode by controlling the voltage values applied to respective transfer electrodes. Namely, charges in the n-type channel can be transferred in a desired direction.
In order to make a charge transfer device transfer charges in a desired direction at high speed and with low transfer loss, it is desired to suppress energy levels, which may become capture levels of charges, from being formed in the n-type channel. For example, if the crystallinity of a semiconductor surface is irregular, energy levels allowing charges to reside may be formed in the forbidden band in which electrons do not exist otherwise. Such energy levels may become capture levels.
In order to avoid the formation of capture levels, a buried channel structure is generally adopted to CCD-type charge transfer devices. Basically, an electrically insulating layer is formed on the n-type channel, and transfer electrodes are formed on this electrically insulating layer. In the buried channel, the energy of carriers in the surface layer is set high in order to transfer carriers only in the bulk region deeper than the surface layer. To this end, the potential of the buried channel is set always higher than the potential of the transfer electrodes by properly selecting the n-type impurity concentration of the n-type channel, the p-type impurity concentration of a p-type region at the periphery of the n-type channel, and the thickness of the electrically insulating layer.
In this embodiment, “potential” and “voltage” of an n-type channel or an electrode are intended to mean potential and voltage which are defined by utilizing as a reference the potential of the p-type region at the periphery of the n-type channel.
When a high negative voltage is applied to a charge transfer device having an n-type buried channel, holes are induced in the surface layer of the n-type channel to form an inverted layer to such an extent that the potential of the n-type channel cannot be controlled by a voltage applied to the transfer electrode. From this reason, the charge transfer device having the n-type buried channel is generally driven by positive pulse voltage trains.
All charge transfer devices made of CCD's, particularly CCD's of a two-phase drive type, are driven by positive pulse voltage trains. In a two-phase drive type CCD, in order to determine a transfer direction of charges in the channel, a region (accumulation region) having a high impurity concentration and a region (barrier region) having a low impurity concentration are alternately formed in the channel.
If a charge transfer device is driven by positive pulse voltage trains, there is the advantage that a gate protection circuit can be formed easily. The gate protection circuit protects gates including transfer gates from electrostatic breakdown.
For example, a gate protection circuit can be formed by grounding the gate and source of a MOS type field effect transistor and connecting the drain to a bus line. If the charge transfer device is driven by positive pulse voltage trains, grounding the gate and source of a MOS type field effect transistor of the gate protection circuit can be realized by connecting the gate and source to the p-type region at the periphery of the n-type channel.
As an exception, negative pulse voltage trains are used for driving the vertical charge transfer devices (VCCD) of a CCD type solid state image pickup apparatus of the type that portions of transfer electrodes are used as the read gates for controlling to read charges from photoelectric conversion elements.
Such a solid state image pickup apparatus is utilized as an area image sensor. A number of photoelectric conversion elements are disposed on one surface of a semiconductor substrate in a plurality of rows and columns and in a matrix shape. For example, one vertical charge transfer device (VCCD) per one photoelectric conversion element column is disposed along this column. A horizontal charge transfer device (HCCD) driven by positive pulse voltage trains is electrically connected to the output end of each of vertical charge transfer devices (VCCD's), and a charge detector circuit is electrically connected to the output end of the horizontal charge transfer device.
When charges accumulated in each photoelectric conversion element are read to the vertical charge transfer device, a read pulse of a positive potential (e.g., 15 V) is applied to a predetermined transfer electrode constituting the vertical charge transfer device. When the charges read by the vertical charge transfer device are transferred toward the horizontal charge transfer device, the vertical charge transfer device is driven by negative pulse voltage trains in order to prevent charges once read from flowing in a reverse direction toward the photoelectric conversion elements and prevent charges from being read from undesired photoelectric conversion elements. For example, the negative pulse voltage train is −7 V at a low level and 0 V at a high level.
As compared to additionally forming read gate electrodes, the integration degree of photoelectric conversion elements can be increased more easily by utilizing as the read gates the transfer gates of the vertical charge transfer device. It is easy to form an area image sensor having a good resolution.
As compared to connecting a gate protection circuit to a charge transfer device driven by positive pulse voltage trains, it becomes complicated to form the gate protection circuit if the gate protection circuit is connected to the vertical charge transfer device of the type described above.
Namely, since the gate and source of a MOS type field effect transistor of the gate protection circuit are grounded, it is necessary to form a second p-type region different from the p-type region at the periphery of the n-type channel and to apply a negative bias voltage to the second p-type region.
If the resolution of an area image sensor is to be improved with a priority over such requirements, vertical charge transfer devices driven by negative pulse voltage trains are used.
In transferring charges from the vertical charge transfer devices to the horizontal charge transfer device, it is necessary to set the channel potential of the regions of the horizontal charge transfer device where charges are received, higher than the channel potential of the vertical charge transfer devices.
For example, the channel potential is about 8 to 9 V when the high level (0 V) voltage is applied to the vertical charge transfer device driven by the negative pulse voltage trains. It is therefore necessary to set the channel potential of the region of the horizontal charge transfer device where charges are received, for example, to about ten and several V.
The horizontal charge transfer device is therefore driven by positive pulse voltage trains of, for example, 3 to 5 V of the high level potential and 0 V of the low level potential. When charges from the vertical charge transfer device are received, a high level voltage is applied to a predetermined transfer electrode of the horizontal charge transfer device.
Similarly, when charges are transferred from the horizontal charge transfer device to the charge detector circuit, it is necessary to set the potential of the charge detector circuit higher than the channel potential of the horizontal charge transfer device.
For example, the charge detector circuit has a floating diffusion region (hereinafter abbreviated to “FD region”), a reset transistor and a source follower. The FD region is electrically connected via an output gate to the output end of the horizontal charge transfer device. The reset transistor has the FD region as its source region, and the source follower is connected to the FD region.
By opening and closing the gate of the reset transistor, the potential of the FD region is set to a reference potential, and charges are transferred from the horizontal charge transfer device via the output gate to the FD region set to the reference potential.
When charges are sent from the horizontal charge transfer device to the FD region, a low level voltage is applied to the transfer electrode at the output end of the horizontal charge transfer device so that the channel potential under the transfer electrode becomes, for example, 7 to 8 V. The reference potential of the FD region is set to have a value, e.g., 12 to 15 V sufficiently higher than the channel potential (e.g., 7 to 8 V) at the output end of the horizontal charge transfer device when the charges are output, in order to allow charges to be received from the horizontal charge transfer device and in order to have a sufficient output dynamic range of the charge detector circuit.
Voltage used for setting the potential of the FD region to the reference potential is generally used as an input to the source follower circuit. Therefore, the power source voltage of the source follower circuit is, for example, 12 to 15 V.
By using this power source voltage, the source follower circuit generates a voltage signal corresponding to a change amount in the potential of the FD region to be caused by the transfer of charges from the horizontal charge transfer device, amplifies this voltage signal and outputs it.
Relatively large current is flowed through the source follower circuit in order to obtain a current capacity sufficiently large for an external load. For example, if the charge transfer rate (signal data rate) from the horizontal charge transfer device to the charge detector circuit is about 20 MHz, a current of about 8 mA is usually flowed through the source follower circuit. A consumption power reduced from this current is about 96 mW.
A low consumption power is desired for a solid state image pickup apparatus assembled in a compact mobile apparatus such as a portable phone. It is not preferable to consume a power of about 100 mW only by the charge detector circuit of a solid state image pickup apparatus.